fix compiler warnings.
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a856b8512d
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9d7aa2eef2
@ -366,7 +366,7 @@ SPI3_HOST = 2
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#define PARALLEL_INIT_TFT_DATA_BUS \
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#define PARALLEL_INIT_TFT_DATA_BUS \
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for (int32_t c = 0; c<256; c++) \
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for (int32_t c = 0; c<256; c++) \
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{ \
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{ \
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xset_mask[c] = 0; \
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xset_mask[c] = 0; \
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if ( c & 0x01 ) xset_mask[c] |= (1 << (TFT_D0-MASK_OFFSET)); \
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if ( c & 0x01 ) xset_mask[c] |= (1 << (TFT_D0-MASK_OFFSET)); \
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if ( c & 0x02 ) xset_mask[c] |= (1 << (TFT_D1-MASK_OFFSET)); \
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if ( c & 0x02 ) xset_mask[c] |= (1 << (TFT_D1-MASK_OFFSET)); \
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if ( c & 0x04 ) xset_mask[c] |= (1 << (TFT_D2-MASK_OFFSET)); \
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if ( c & 0x04 ) xset_mask[c] |= (1 << (TFT_D2-MASK_OFFSET)); \
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@ -374,7 +374,7 @@ SPI3_HOST = 2
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if ( c & 0x10 ) xset_mask[c] |= (1 << (TFT_D4-MASK_OFFSET)); \
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if ( c & 0x10 ) xset_mask[c] |= (1 << (TFT_D4-MASK_OFFSET)); \
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if ( c & 0x20 ) xset_mask[c] |= (1 << (TFT_D5-MASK_OFFSET)); \
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if ( c & 0x20 ) xset_mask[c] |= (1 << (TFT_D5-MASK_OFFSET)); \
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if ( c & 0x40 ) xset_mask[c] |= (1 << (TFT_D6-MASK_OFFSET)); \
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if ( c & 0x40 ) xset_mask[c] |= (1 << (TFT_D6-MASK_OFFSET)); \
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if ( c & 0x80 ) xset_mask[c] |= (1 << (TFT_D7-MASK_OFFSET)); \
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if ( c & 0x80 ) xset_mask[c] |= (1 << (TFT_D7-MASK_OFFSET)); \
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} \
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} \
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// Mask for the 8 data bits to set pin directions
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// Mask for the 8 data bits to set pin directions
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